[cpp-threads] [Javamemorymodel-discussion] there's a happens-before orderhere. right?

[Paul E. McKenney]

On Tue, Dec 16, 2008 at 01:22:19AM +0000, Boehm, Hans wrote:
> 
> 
> > -----Original Message-----
> > From: cpp-threads-bounces at decadentplace.org.uk
> > [mailto:cpp-threads-bounces at decadentplace.org.uk] On Behalf
> > Of Alexander Terekhov
> > Sent: Monday, December 15, 2008 5:08 PM
> > To: paulmck at linux.vnet.ibm.com
> > Cc: Endre Stølsvik; C++ threads standardisation;
> > javamemorymodel-discussion at cs.umd.edu
> > Subject: Re: [cpp-threads] [Javamemorymodel-discussion]
> > there's a happens-before orderhere. right?
> >
> > On Tue, Dec 16, 2008 at 12:41 AM, Paul E. McKenney
> > <paulmck at linux.vnet.ibm.com> wrote:
> > [...]
> > > Indeed -- although PowerPC respects control dependencies, other
> > > architectures apparently do not.
> >
> > I'm not sure about "apparently". AFAIK, there isn't a
> > clear/apparent "no" regarding respect of control dependencies
> > for load-control-dependent-store case. Silence is open to
> > interpretation... ;-)
>
> My impression is that ARM does not respect control dependencies, at
> least according to the spec.

That is my impression as well.

>                               Itanium does, but uses a weaker definition.
> If we write the assembly version of
> 
> if (x) y = 1;
> z = 1;
> 
> using a branch,
> 
> the assignment to z is not control dependent on x for Itanium, but I
> believe it is for PowerPC.

Cute!  I would have to check up on this one, but it is quite possible
that PowerPC is permitted to reorder the store to z.  After all, as
soon as execution reaches the "if", absent exceptions or interrupts,
execution is guaranteed to reach the store to z.

> This may be a problem even for PowerPC at the C++ level, if the
> if-statement is translated to a conditional move?  That's certainly
> likely to happen on Itanium, aside from the hardware issue.

By "conditional move" on PowerPC, you mean explicitly forming a mask
from the condition register and combining it with the value to be moved?
I believe that doing this would result in control and data dependencies.

							Thanx, Paul

> PowerPC and ARM (and possibly embedded MIPS?) are probably the
> most important architectures for these discussions, since the other
> major architectures are likely to convert memory_order_consume to
> memory_order_acquire anyway, for various reasons.
> 
> Hans
> 
> >
> > regards,
> > alexander.
> >
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