[cpp-threads] Brief example ITANIUM Implementation for C/C++ MemoryModel

[Alexander Terekhov]

On Fri, Dec 26, 2008 at 8:40 AM, Hans Boehm <Hans.Boehm at hp.com> wrote:
>
> On Wed, 24 Dec 2008, Peter Dimov wrote:
>
>>> Load Seq_Cst:  mf,ld.acq
>>
>> I think that the intent of the seq_cst spec was to allow a single ld.acq
>> here (and a simple MOV on x86).
>>
>
> Yes.  For both Itanium and X86.  Sorry.  I overlooked that.

I disagree. ld.acq is load acquire, not seq_cst. Load seq_cst ought to
impose an extra leading store-load barrier (same as with trailing
store load barrier for seq_cst stores vs. st.rel). In the case of
adjacent seq_cst operations, redundant store-load fencing can be
optimized out by the compiler/implementation. Think of mixing seq_cst
operations with relaxed and/or acquire/release ones.

regards,
alexander.