[cpp-threads] modes, pass 2

Doug Lea dl at cs.oswego.edu
Wed May 11 15:43:41 BST 2005


> 
> < Forward Quoted > (my "PMFJI" reply is <Forward Inline>'d below it)
> 

Thanks!

Maybe I read this the wrong way, but reading it confirmed some
of my long-held understandings and biases that I've been trying
and failing to change in the past few weeks:

1. There are only a few modes on atomics that are worth exposing
    1. load, suppressing any speculative forward loads
    2. store, suppressing reorderings wrt preceeding stores
    3. store, ensuring that read-after-write works
    Plus a couple of flavors of CAS and counter operations

Weakening or eliding these when possible is so tricky and 
processor-dependent that you'd really like to leave it in the hands of
compilers. People like Alexander will torture the compiler
vendors until these optimizations can routinely
outperform manual micro-optimizations, and never get them wrong.

These also turn out to correspond to semantic actions that
we have a good chance of explaining in overall memory model.

    (Aside: One reason making standards is hard is because you
     need to keep in mind how the likely consequences of the standard
     will fit together -- people will change the way they program;
     the kinds of programs they even write will change;
     compilers will change; hardware will change.)

2. Just about the only universally good use of LL/SC is
CAS/weakCAS.

> Oh, Ah, BTW, what's the fuss with dangling larxs on 970? 
> 
> http://tinyurl.com/4gk8f
> 

3. I still think isync works as LoadLoad barrier.

>   . consumer spins on the flag until it is reset
>>   . consumer executes an "isync" to discard any subsequent speculative
>> memory reads
>>   . consumer reads the data


Please tell me which of these things I got wrong :-)


-Doug









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