[cpp-threads] RE: "Agenda" for august 23-25 concurrency meeting

[Alexander Terekhov]

On 9/2/06, Herb Sutter <hsutter at microsoft.com> wrote:
[...]
>  any multi-variable invariant maintained by more than one thread,
>  where two threads update different parts of the invariant.
>
> That describes a pretty broad set of cases that directly exploit/explode the hole
> in the PC "writes by the same processor occur in order" world by having the
> writes occur on different processors.

It's not that bad. PC provides "transitivity" sans remote write
atomicity (i.e. a requirement for a store to become visible to *all*
other processors "atomically" -- it doesn't allow a load to return the
value of another processor's store before all cached copies of the
accessed location receive the invalidation or update messages
generated by the store). Replace ia32 loads with
ia32_lock_cmpxchg(address, 42, 42) and the issue will disappear.

<quote source = Intel's CMPXCHG Description>

The destination operand is written back if the comparison fails;
otherwise, the source operand is written into the destination.
(The processor never produces a locked read without also producing
a locked write.)

</quote>

I suspect that ia32_lock_xadd(address, 0) will also work, but I'm
somewhat missing strong language about mandatory write/"locked read"
as in CMPXCHG.

regards,
alexander.