[cpp-threads] Re: Increment/decrement operators on atomics package

[Raul Silvera]

Peter Dimov wrote on 04/27/2007 12:15:37 PM:

> Raul Silvera wrote:
>
> > Also, note that RMW operations are orders of magnitude more expensive
> > than regular accesses in pretty much all architectures. In some
platforms
> > they
> > may require acquiring a lock. So I believe the programmer should make
it
> > explicit whether RMW semantics are required for each specific
operation.
>
> Isn't it likely that (given the SC consensus) _any_ operation, even a
load,
> on an atomic<> would effectively be a RMW? (Remote write atomicity, IRIW
and
> all that...)

No. Part of the argument during the SC discussion was RMW operations
wouldn't
be needed to implement SC memory accesses, so that loads would be
relatively cheap.
Implementing SC loads as RMW operations would be disastrous for performance
as
parallel loads would create contention on that memory location.

SC forces a total order on all memory operations, while RMW requires
basically
a locking mechanism (either in hardware or software).

Particularly for PPC, SC only requires fences between each pair of memory
accesses,
while RMW operations require a load-reserve/store-conditional loop.

--
Raúl E. Silvera         IBM Toronto Lab   Team Lead, Toronto Portable
Optimizer (TPO)
Tel: 905-413-4188 T/L: 969-4188           Fax: 905-413-4854
D2/KC9/8200/MKM