[cpp-threads] Alternatives to SC

Alexander Terekhov alexander.terekhov at gmail.com
Tue Jan 16 19:58:20 GMT 2007


On 1/16/07, Raul Silvera <rauls at ca.ibm.com> wrote:
>
> Alexander Terekhov" <alexander.terekhov at gmail.com:
> >
> > But given that for "[s]tores to storage that is Memory Coherence
> > Required and is neither Write Through Required nor Caching Inhibited"
> > eieio is also cumulative...
> >
> > P1: x = 1;
> > P2: if (x == 1) eieio(), y = 2;
> > P3: if (y == 2) isync(), assert(x == 1);
> >
> > Would also do it, I suppose. ("Storage that is Write Through Required
> > or Caching Inhibited is not intended to be used for general-purpose
> > programming.")
>
> Almost, but not quite. While it is true that the control-flow dependence
> orders x==1 and y=2 on P2, that ordering is not cumulative.
> eieio does provide cumulative ordering, but only orders stores (in this
> scenario), so it doesn't apply to the pair x==1 and y=2.

Uhmm. But what we need to order is *store* to x (by P1) and *store* to
y (by P2) both with respect to P3 (so that store to y by P2 doesn't
become visible to P3 before store to x by P1 becomes visible to P3).

Looking only locally on P2 and eieio, "A" is empty/whatever and "B"
includes P2's store y=2. But then we apply "cumulative" expansion for
"A" and "B" we arrive at the same result as in the case with {lw}sync
and visibility of P1's store x=1 on P3.

If you disagree then please elaborate. (And also explain what does
"cumulative" means for eieio and storage that is Memory Coherence
Required and is neither Write Through Required nor Caching Inhibited).
TIA.

regards,
alexander.



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