[cpp-threads] A question about N2153
Raul Silvera
rauls at ca.ibm.com
Tue Jan 23 01:30:51 GMT 2007
As per the definitions in N2153, an ordered RMW has the acquire and release
orderings apply to both the load and store implied by the operation.
--
Raúl E. Silvera IBM Toronto Lab Team Lead, Toronto Portable
Optimizer (TPO)
Tel: 905-413-4188 T/L: 969-4188 Fax: 905-413-4854
D2/KC9/8200/MKM
"Peter Dimov"
<pdimov at mmltd.net
> To
Sent by: "C++ threads standardisation"
cpp-threads-bounc <cpp-threads at decadentplace.org.uk>
es at decadentplace. cc
org.uk
Subject
Re: [cpp-threads] A question about
01/19/07 10:35 AM N2153
Please respond to
C++ threads
standardisation
<cpp-threads at deca
dentplace.org.uk>
Raul Silvera wrote:
> N2153 is trying to propose a model that does not overtly favor any
> specific niche CPU. We're looking for a trade-off between
> programmability and performance across the whole spectrum of parallel
> architectures.
One more question, can you clarify the semantics of RMW_ordered? Is it
equivalent to RMW_acquire_release, where the acquire applies to the read
part, and the release applies to the write part, or is it ordered more
strongly (total systemwide order on all RMW_ordered, useful for building SC
atomics)?
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