[cpp-threads] std::atomic<> in acquire-release mode and write atomicity

[Alexander Terekhov]

On Tue, Dec 16, 2008 at 3:05 AM, Paul E. McKenney
<paulmck at linux.vnet.ibm.com> wrote:
> On Tue, Dec 16, 2008 at 02:46:32AM +0100, Alexander Terekhov wrote:
>> On Tue, Dec 16, 2008 at 1:00 AM, Paul E. McKenney
>> <paulmck at linux.vnet.ibm.com> wrote:
>> [...]
>> > I agree that std::atomic<> in acquire-release mode does not support IRIW.
>> > Whether this is due to a failure to totally order stores or a failure
>> > to provide cumulativity to loads is a philosophical point, at least from
>> > what I can tell.  ;-)
>>
>> How about
>>
>> P1: Y = 1;
>> P2: if( Y == 1 ) { Z = 1; }
>> P3: if( Z == 1 ) { assert( Y == 1 ); }
>>
>> ?
>
> Hmmm...  No memory fences of any kind, so that the loads and stores
> are all memory_order_relaxed, correct?

No. We are in (load.)acquire-(store.)release mode. I meant:

P1: Y.store(1, release);
P2: if( Y.load(acquire) == 1 ) { Z.store(1, release); }
P3: if( Z.load(acquire) == 1 ) { assert( Y.load(acquire) == 1 ); }

regards,
alexander.