[cpp-threads] Brief example ITANIUM Implementation for C/C++ Memory Model

[Hans Boehm]

On Sat, 27 Dec 2008, Alexander Terekhov wrote:

> On Wed, Dec 24, 2008 at 6:58 AM, Hans Boehm <Hans.Boehm at hp.com> wrote:
>>
>> On Tue, 23 Dec 2008, Alexander Terekhov wrote:
>>
>>> Following the lead of
>>>
>>> http://www.rdrop.com/users/paulmck/scalability/paper/N2745r.2008.12.16a.html
>>> (cmpxchg aside for a moment aside, "Store Seq Cst" is surely busted)
>>>
>>> here's a brief example ITANIUM implementation for C/C++ Memory Model:
>>>
>>> (cmpxchg aside for a moment)
>>>
>>> Load Relaxed:  ld
>>> Load Consume:  ld
>>> Load Acquire:  ld.acq
>>> Load Seq_Cst:  mf,ld.acq
>>> Store Relaxed: st
>>> Store Release: st.rel
>>> Store Seq Cst: st.rel,mf
>>> Consume Fence: <ignore>
>>> Acquire Fence: mf
>>> Release Fence: mf
>>> Acq_Rel Fence: mf
>>> Seq_Cst Fence: mf
>>>
>>> Any objections and/or questions?
>>
>> None, except that Load relaxed is also ld.acq, in order to prevent
>> reordering of loads from the same location.
>
> Do you have an example illustrating the need of .acq for relaxed loads?
With everything initially zero:

Thread1: x.store(memory_order_relaxed,1);

Thread2:
r1 = x.load(memory_order_relaxed);  // sees 1
r2 = x.load(memory_order_relaxed);  // sees 0

This is not allowed by the C++ memory model, but Itanium loads from the
same location can be reordered.  Compiling these as ld.acq solves the
problem.

Hans


>
> TIA.
>
> regards,
> alexander.
>
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