[cpp-threads] Brief example ITANIUM Implementation for C/C++ Memory Model

[Alexander Terekhov]

On Sat, Dec 27, 2008 at 8:18 PM, Hans Boehm <Hans.Boehm at hp.com> wrote:
>
> On Sat, 27 Dec 2008, Alexander Terekhov wrote:
>
>> On Wed, Dec 24, 2008 at 6:58 AM, Hans Boehm <Hans.Boehm at hp.com> wrote:
>>>
>>> On Tue, 23 Dec 2008, Alexander Terekhov wrote:
>>>
>>>> Following the lead of
>>>>
>>>> http://www.rdrop.com/users/paulmck/scalability/paper/N2745r.2008.12.16a.html
>>>> (cmpxchg aside for a moment aside, "Store Seq Cst" is surely busted)
>>>>
>>>> here's a brief example ITANIUM implementation for C/C++ Memory Model:
>>>>
>>>> (cmpxchg aside for a moment)
>>>>
>>>> Load Relaxed:  ld
>>>> Load Consume:  ld
>>>> Load Acquire:  ld.acq
>>>> Load Seq_Cst:  mf,ld.acq
>>>> Store Relaxed: st
>>>> Store Release: st.rel
>>>> Store Seq Cst: st.rel,mf
>>>> Consume Fence: <ignore>
>>>> Acquire Fence: mf
>>>> Release Fence: mf
>>>> Acq_Rel Fence: mf
>>>> Seq_Cst Fence: mf
>>>>
>>>> Any objections and/or questions?
>>>
>>> None, except that Load relaxed is also ld.acq, in order to prevent
>>> reordering of loads from the same location.
>>
>> Do you have an example illustrating the need of .acq for relaxed loads?
>
> With everything initially zero:

That means initialization by zeroing (writing zero to) memory
initially (initial write).

>
> Thread1: x.store(memory_order_relaxed,1);

(With preceding initial write of zero to x -- think of Thread0)

Would you object to change your Thread1's code to

Thread1: r0 = x.load(relaxed), x.store(relaxed,1), r3 = x.load(relaxed);

and prescription of mandatory outcome r0=0, r3=1 in Thread1 given that
Thread1 is the only thread (after initialization) modifying x?

>
> Thread2:
> r1 = x.load(memory_order_relaxed);  // sees 1
> r2 = x.load(memory_order_relaxed);  // sees 0
>
> This is not allowed by the C++ memory model, but Itanium loads ...

... must obey the coherence ("COH") rule.

Or am I just missing or misunderstanding something?

Please elaborate.

TIA.

regards,
alexander.