[cpp-threads] modes, pass 2

[Peter Dimov]

Doug Lea wrote:
> Presumably you mean ...
>
>> Now, with respect to PowerPC... The cookbook says that isync
>> is a LoadLoad barrier. I don't think so.

My understanding is that isync is hoist-load barrier in Alexander's terms 
because it cancels any speculative loads. After a branch it's an acquire 
because of the combination with the implied cchsb. I was wondering whether 
it's a #loadload as well; it could be technically possible for an earlier 
load to "sink" below a later load, even with an intervening isync. But the 
Load Hit Load rule seems to prevent that; it was the last remaining piece of 
the puzzle. :-) If isync is indeed a #loadload, the isync+eieio combination 
before RMW is a legitimate way to implement release as well.