[cpp-threads] RE: "Agenda" for august 23-25 concurrency meeting

Nick Maclaren nmm1 at cus.cam.ac.uk
Wed Aug 30 13:13:10 BST 2006


"Alexander Terekhov" <alexander.terekhov at gmail.com> wrote:
> On 8/29/06, Robison, Arch <arch.robison at intel.com> wrote:
> > The Intel(R) Threading Building Blocks that I presented at the meeting
> > is now an official product, so anyone can download the documentation
> > from: http://www3.intel.com/cd/software/products/asmo-na/eng/294796.htm
> 
> I've got one simple question. How one is supposed to do classic SC
> (Lamport's) on IA-32 multi (core/processor/HT/whatever)?

Eh?  Can you explain?

As I view it, the Threading Building Blocks are a restricted, higher
level interface, where mere mortals might just make use of multi-core
systems.  If you use it correctly, you get sequential consistency
automatically, because it doesn't expose the issues where you wouldn't.
Yes, you could probably abuse the mechanism to break that, but there
is no defence against people determined to shoot themselves in the foot.

There are other simple models, such as the master/slave/spawning one
commonly used in things like Web servers, where following fairly
simple rules on the use of the (limited) global objects is enough
to ensure global consistency.

If you want something which gives you the full flexibility of a Hoare
(or Lamport) model, then you need something that is at least OpenMP
and perhaps POSIX threads.  And then it is YOUR problem to ensure
sequential consistency by following suitable rules.  But all experience
is that mere mortals have major trouble with this, so much so that few
(if any) ever get such code working.

Or have I misunderstood you?


Regards,
Nick Maclaren,
University of Cambridge Computing Service,
New Museums Site, Pembroke Street, Cambridge CB2 3QH, England.
Email:  nmm1 at cam.ac.uk
Tel.:  +44 1223 334761    Fax:  +44 1223 334679



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