[cpp-threads] SC on PPC (was Re: Increment/decrement operators on
atomics package)
Alexander Terekhov
alexander.terekhov at gmail.com
Mon Apr 30 20:09:12 BST 2007
On 4/30/07, Raul Silvera <rauls at ca.ibm.com> wrote:
>
> Alexander Terekhov wrote on 04/30/2007 08:10:19 AM:
>
> > How does cumulativity help in the IRIW case?
> >
> > P1: x = 1;
> > P2: y = 1;
> > P3: r1 = x; r2 = y;
> > P4: r3 = y; r4 = x;
> >
>
> The short version of this is that cumulativity on a hwsync between the two
> loads on P3 would cause a StoreLoad ordering between P1's store to x
> and P3's load of y.
This is rather intriguing because unless I'm just missing something,
cumulativity is defined the same for all barriers including
lwsync/eieio and it comes into play when *P3* makes a post-barrier
store which is observed by another processor.
>
> Do the same for P4, plus some wild hand-waving, and you get to forbid the
> disallowed IRIW outcome.
That's a lot of hand-waving, I'm afraid. ;-)
regards,
alexander.
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