[cpp-threads] SC on PPC

[Raul Silvera]

Peter Dimov wrote on 04/30/2007 01:42:01 PM:

> Raul Silvera wrote:
> > Alexander Terekhov wrote on 04/30/2007 08:10:19 AM:
> >
> >> How does cumulativity help in the IRIW case?
> >>
> >> P1: x = 1;
> >> P2: y = 1;
> >> P3: r1 = x; r2 = y;
> >> P4: r3 = y; r4 = x;
> >>
> >
> > The short version of this is that cumulativity on a hwsync between
> > the two loads on P3 would cause a StoreLoad ordering between P1's
> > store to x and P3's load of y.
>
> Interesting. Does this mean that an ordered load is
>
> sync
> load
> sync
>
> and not
>
> sync
> load
> lwsync
>
> as I assumed at first? (Under a context-free literal translation.)

Correct. You need a hwsync after the load or order it with respect to
subsequent relaxed loads.

> I think that we need a "cookbook" on how to implement the various
> constraints on PPC, x86, IA64, SPARC TSO, and possibly ARM.

Agreed. That would be useful. For PPC, I expect:

ord_load:     sync;load;sync
ord_store:  lwsync;store;sync
acq_load:   load;lwsync
rel_store:  lwsync;store

You can see the much larger overhead associated to ordered loads/stores.
This is why from my point of view SC-atomics are basically toys and
that anybody serious about using atomic operations has to learn to use
the acquire/release model.

--
Raúl E. Silvera         IBM Toronto Lab   Team Lead, Toronto Portable
Optimizer (TPO)
Tel: 905-413-4188 T/L: 969-4188           Fax: 905-413-4854
D2/KC9/8200/MKM