[cpp-threads] SC for IRIW on Power Architecture

[Raul Silvera]

cpp-threads-bounces at decadentplace.org.uk wrote on 01/17/2007 06:21:01 AM:

>
> > IRIW case:
> >
> > P1: x = 1;
> > P2: y = 1;
> > P3: r1 = x; r2 = y;
> > P4: r3 = y; r4 = x;
> >
> > Let's add syncs...
> >
> > P1: x = 1;
> > P2: y = 1;
> > P3: r1 = x; sync(); r2 = y;
> > P4: r3 = y; sync(); r4 = x;
> >
> > Would that be SC according to Power Architecture specification? I
> > don't think so.
> >
>
> I agree that it is not SC according to section 1.7 (mainly) of book 2
> of current PPC spec
>
(http://www-128.ibm.com/developerworks/eserver/library/es-archguide-v2.html)

> And people I asked at IBM agree with me. It is possible to twist some
> unintended meaning into a few statements in the spec to conclude that
this
> is SC, but they will hopefully be fixing/clarifying this.

This is still being debated inside IBM. In any case, regardless of how it
is achieved, the point is that there is a very significant overhead to
achieve SC on PPC, and that this overhead affects not just writers, but
also readers.