[cpp-threads] Yet another visibility question

Hans Boehm Hans.Boehm at hp.com
Thu Jan 11 01:10:55 GMT 2007



On Thu, 11 Jan 2007, Peter Dimov wrote:

> Hans Boehm wrote:
> >
> > There are still parallel discussions about hardware implications, and
> > how difficult this really is on existing hardware, as opposed to with
> > existing hardware specs, to what extent it inherently slows down
> > the hardware, and whether or not we can actually describe the
> > semantics of atomics intelligibly without this property.
>
> I'm still a bit confused. N2145 doesn't contain any support for sequential
> consistency, does it? I recall that when I suggested that we need
> atomic_op_fence to support SC, nobody seemed to like this addition, and
> _ordered was specifically not intended to deliver SC. Right?
Basically, we've been putting this off until the hardware issues are
better understood.  I think it is relatively easy to add an SC requirement
after the fact for certain kinds of atomic operations.  The other way is
harder.  My intent was to have the default assignment on atomics guarantee
SC if possible.  If you want something weaker, you should have to state
that.

>
> If the plan is to support SC only in atomic<> and not in the low-level
> layer, do we have an idea how this is going to be implemented? Maybe just do
> what Java does? Are we sure that the existing Java implementations ensure a
> total system-wide order of all volatile stores? The cookbook makes no
> mention of that and implies that no barriers are needed in my example under
> x86. But x86 is not TSO, is it?
Some of these issues were not fully understood when the Java memory model
was agreed upon either.  It is not completely clear to me to what extent
current X86 implementations are TSO; the spec has generally been read as
not promising it.

The question for some of these architectures is clearly to what extent
we can convince the architects to strengthen the memory model.  That
probably depends in part on what current implementations actually do,
and how strong the performance arguments are for the weaker specs.
Several of us are not convinced that if we take all the current hardware
specs as set in stone, we end up in a place we want to be.

Hans



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